Over at Beetlebox we are excited for the release of Vitis, which is the unification of all of Xilinx’s previous software into a single package. We have been working hard on computer vision using this platform and thought that we could provide some help to others wanting to get started on Xilinx’s development boards. This tutorial will be a multi-part series covering the basics of getting started with computer vision and Vitis and will be covering:
We hope these tutorials will be useful for anyone looking to get into computer vision on FPGAs.
XRT acts as the interface between our acceleration kernels on the FPGA fabric and our CPU host and makes interacting between the CPU and the FPGA on our embedded system far simpler than previous methods. Acceleration using Vitis is very similar to how we accelerate using GPUs, in which we develop kernels that then are placed onto the FPGA fabric. XRT is also reliant on Linux so we need to get Linux running on our boards. XRT is not the only method for acceleration and the older methods that were used by Xilinx’s SDK can still be used with Vitis, but XRT presents the easiest method of acceleration. For more information on XRT and other methods please see here.
Our particular setup:
Unfortunately, at the moment getting XRT and Linux working on Xilinx boards isn’t as simple as downloading many files. The files required are simply too large and must be generated using Petalinux. Fortunately, we have been provided with easy methods of generating these files through scripts.
git clone --branch 2019.2 https://github.com/Xilinx/XRT.git
Mkdir ~/Petabuilds Cd ~/Petabuilds
source /tools/Xilinx/Vitis/2019.2/settings64.sh source /opt/xilinx/xrt/setup.sh
<xrt_repo_directory>/XRT/src/runtime_src/tools/scripts/peta_build.sh --bsp <bsp> ./xsa_build/<platform name>/<platform name>.xsa
cd /mnt ./test.exe
We have successfully built a Vitis embedded system from scratch and made it execute code.
Next: How to build “Hello World” and understanding Vitis Development Flow
If you have enjoyed this tutorial but are in current need of talent to build advanced Computer Vision systems on FPGAs, consider joining our ClickCV Early Access programme. ClickCV Early Access provides bespoke service and support for developing advanced Computer Vision systems on FPGAs. We use our own proprietary Computer Vision Library, ClickCV, to provide our clients the cutting edge in low latency, high definition processing. Contact us today to find out how we could build your next-generation system.
About the Author: Andrew Swirski is the founder and managing director of Beetlebox, a Computer Vision Acceleration specialist. The company develops the Computer Vision Acceleration library called ClickCV, which is designed to fully utilise the hardware adaptability and performance of FPGA chips. Beetlebox is currently running an Early Access programme, where the company provides bespoke service and support to develop client’s Computer Vision systems on FPGAs. Before Beetlebox, Andrew Swirski previously worked at Intel (formerly Altera) in FPGA encoding and decoding. He completed a Masters’ in Electrical and Electronic Engineering from Imperial College London in 2017.
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Hi, Thanks for the tutorial. I’m following the instrucción of Part 1, but I have a question. I the last part it’s necessary to copy the rootfs in the second partition? Where is it made?.
A lot of thanks.
Your Comment …
Hi, thanks for your useful tutorial. I have a question how can I add tensorflow in petalinux and vitis?
To use Tensorflow, you will need to use Vitis AI, which is actually a separate tool to Vitis. The model can then be used to generate an IP which can be placed in Vivado. Here is the link for Vitis AI:
Thank you very much for your help.
Can you please clarify this command?
/XRT/src/runtime_src/tools/scripts/peta_build.sh –bsp ./xsa_build//.xsa
what should I type in place of the argument?
” ” is the argument I need to clarify
Lord this is a limited text entry…..
Please clarify the BSP definition of this command.
Sorry for the limited text entry. We are still improving the blog.
For the bsp argument you will need to replace that with the BSP relevant to the board you are using. For Xilinx boards these can be found at:
If you are using a custom board, you will need to generate your own BSP file through Vivado. You can also run the script without specifying the BSP but in our experience this can cause hanging on boot, so we recommend that you supply a BSP.
Apologies for the rant… 🙂
I determined that I needed to point the tools to the BSP of my target dev-kit (ZCU102). The build completed and I’m making sound if slow progress.
This is a very useful Blog, please do keep it updated.
Daniel J St. John
Outstanding! Looking forward to more.